Model FLOPs Utilisation.
Count the FLOPs the model needs, divide by the time taken and the chips’ peak — and see how much of the hardware the run really used.
Model FLOPs utilisation (MFU) compares what a run achieves with what its hardware could do: the model’s training FLOPs per token — about 6N, plus attention — times tokens processed per second, divided by the total peak FLOP/s of the chips. It counts only the arithmetic the model mathematically requires, so work done twice, such as recomputing activations to save memory (plate XIV.2), does not inflate it; hardware FLOPs utilisation (HFU) counts that extra work too.
Published numbers are a useful anchor. PaLM’s 540-billion-parameter model ran at 46.2% MFU on TPU v4. Llama 3 405B, on 8 192 to 16 384 H100s, ran at 38–43% MFU in BF16 depending on the parallel layout and sequence length. The workshop turns a measured throughput into MFU, and back.
Below: left, MFU for the chosen model size and throughput per GPU on an H100, against the throughput. Right, Llama 3’s published configurations and their MFU.
- Define MFU and HFU.
- Compute MFU from throughput, model size and peak.
- Read published MFU figures.
- List where the missing utilisation goes.
Where the other 60% goes
A 405-billion-parameter model needs about 2.63 × 10¹² training FLOPs per token at sequence length 8 192, 7.7% of them in attention. At 40% MFU an H100 therefore processes only about 150 tokens per second for it; at 200 tokens per second it runs at 53.2%. For Llama 3 8B the same 40% means about 6,478 tokens per second per GPU. These numbers make claims checkable: a throughput figure and a model size give the MFU, and an implausibly high MFU usually means a mistake in the FLOP count.
Llama 3 reports 38–43% and PaLM 46.2% (57.8% counting recomputation). The rest is lost in identifiable places: memory-bound operations that cannot use the tensor cores (plate XIII.3), communication not hidden behind compute (plate XIII.5), pipeline bubbles (plate XIV.7), stragglers and restarts (Vol. XV), and the gap between the peak a chip can sustain on a perfect matrix multiply and what real kernels achieve. Most of Part Three is about recovering that utilisation.
Terms
- MFU
- Model FLOPs utilisation: required model FLOP/s divided by peak.
- HFU
- Hardware FLOPs utilisation: all FLOP/s actually executed, including recomputation, divided by peak.
- Throughput
- Tokens processed per second, per GPU or in total.
- Rematerialisation
- Recomputing activations in the backward pass instead of storing them.
Sources
- Chowdhery et al., “PaLM: Scaling Language Modeling with Pathways”, JMLR 2023, section 4.
- Llama Team, AI @ Meta, arXiv:2407.21783, 2024, section 3.3 and Table 4.
- Korthikanti et al., “Reducing Activation Recomputation in Large Transformer Models”, MLSys 2023 (MFU and HFU).